Abstract: This paper reports on the design and characterization of a high-g CMOS-MEMS capacitive accelerometer array with 92 mG bias stability and ± 50 kG designed input range with a validated 91 dB ...

A ±1,300-V/μs output slew rate into capacitive loads up to 1 nF (1000 pF). The 80-pin, 12- × 12-mm TQFP EPAD-up package greatly reduces thermal-management constraints on the PCB layout.

Abstract: This paper describes a two-stage CMOS amplifier that is stable for any capacitive load. This is achieved through the use of an optimized cascoded compensation topology. A new level shifting ...