资讯

EDN15 年
IME launches 10th Electronic Packaging Research Consortium to Address 3-Dimensional ...
Singapore, 30 June 2009 – The Institute of Microelectronics (IME), a research institute of the Agency for Science, Technology and Research (A*STAR), today announced the launch of the 10th Electronic ...
Semiconductor Engineering3 年
A Review on the Fabrication and Reliability of Three-Dimensional Integration Technologies ...
the electronics industry is achieving high-speed, high-performance, and high-density electronic packaging. Three-dimensional (3D) Si-chip stacking using through-Si-via (TSV) and solder bumping ...
Semiconductor Engineering3 年
Research on Wire Sweep of Integrated Circuit Packaging Based on Three-dimensional Flow ...
Therefore, it is a great challenge to master wire sweep in IC packaging process. This paper takes Low Profile Fine Pitch Ball Grid Array (LFBGA) as the research object, applies moldex3D ...
AZOM2 年
New Method for the Direct Three-Dimensional Bonding of Energy Efficient Electronic Devices
Three-dimensional combined circuits are playing a highly significant role in electronic devices. In comparison to traditional 2D circuits ... This technology is expected to contribute to chips with a ...