This new requirement leads to low power transport demultiplexer which is an integral part of multimedia SoC. To achieve cost effective design goal, transport demultiplexer design should be easily ...

The MAX3950 chip implements a shift-register-based demultiplexer to convert 9.953 Gbps CML serial clock and data inputs to 16-bit-wide, 622.08 Mbps LVDS parallel clock and data outputs compatible ...

Throwback time: The basic digital-logic functionality of small-scale integration still has a role, as evidenced by a new shift register and decoder/demultiplexer. The history and continued need of ...