Electronic Design1mon
Graphene-Based Interconnects Could Improve Density of Digital, Analog, and Power ICs
A new process for creating interconnects on ICs using high-conductivity 2D graphene films ... process conditions used to fabricate standard CMOS devices. The process, known as CoolC GT300, enables ...
Design-Reuse8y
SST and SilTerra Announce Production Readiness of Embedded SuperFlash Macros on SilTerra's 180 nm CMOS Platform
July 26, 2016 — Microchip Technology Inc. (NASDAQ: MCHP), a leading provider of microcontroller, mixed-signal, analog and Flash-IP solutions ... Therefore, SST’s high-density, reliable and ...
Design-Reuse6y
SST and UMC Announce Qualification of Embedded SuperFlash Technology on 40 nm CMOS Process
making low power and high density paramount to system designers. Many IC designers are turning to single-chip solutions to implement these features, saving total system costs by combining digital, ...